Multinodal processing architectures have emerged as the leading replacement to complex systems of networked uniprocessors. Examples of these architectures include single-chip multiprocessors and systems on a chip, in which multiple processing nodes are fabricated on a single integrated circuit. An on-chip network with multiple communication sources is often used to interconnect the individual nodes. In accordance with Moore's law, the node count of chip multiprocessors is expected to grow from dozens to hundreds in the near future. However, existing interconnection networks are not easily scalable, and generally do not efficiently accommodate larger multinodal processing architectures.